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DATA SHEET
MOS INTEGRATED CIRCUIT
PD4991A
4-BIT PARALLEL I/O CALENDAR CLOCK
The PD4991A is a CMOS integrated circuit that has the ability to input/output 4-bit parallel time data and calendar data to/from a microcomputer and includes an alarm function. Its reference oscillation frequency is 32.768 kHz. Hour, minute, second, year, month, day, and date data is stored internally. The PD4991A consumes 30 % less power than the PD4991.
FEATURES:
* Time (hour, minute, and second) and calendar (leap year, year, month, day, and date) counters * Leap year can be automatically identified or set * 12- and 24-hour modes selectable * 4-bit parallel input/output in BCD data format * Alarm function (hour, minute, second, month, day, date) * One of 0.1, 1.0, 10, 30, and 60-s interval timer outputs selectable * One of 2048, 1024, 64, 16, 1 Hz, 1-pulse output, and HL output selectable as alarm coincidence output * Upward compatible with PD4991 * Low power consumption: 2 A typ. (VDD = 2.4 V)
ORDERING INFORMATION:
Part Number Package 18-pin plastic DIP (300 mil) 20-pin plastic SOP (300 mil)
PD4991ACX PD4991AGS
Document No. IC-3309 (1st edition) (O.D. No. IC-7892A) Date Published March 1997 P Printed in Japan
(c)
1995 1993
PD4991A
PIN CONFIGURATION (Top View)
CS1 1 TP1 2 TP2 3 A0 4 A1 5 A2 6 A3 7 OE 8 VSS 9
PD4991ACX
18 VDD 17 XIN 16 XOUT 15 CS2
CS1 1 TP1 2 TP2 3 A0 4 NC 5
20 VDD 19 XIN 18 XOUT 17 CS2 16 D3 15 NC 14 D2 13 D1 12 D0 11 WE
PD4991AGS
14 D3 A1 6 13 D2 A2 7 12 D1 11 D0 10 WE A3 8 OE 9 VSS 10
2
OSC 15stage Binary Divider 1/2 SEC. CLOCK STOP CLOCK WAIT MIN. HOUR WEEK DAY MONTH YEAR
15
TIMING PULSE GENERATOR TIME COUNTER
BLOCK DIAGRAM
XIN
XOUT
Nch OPEN DRAIN
CS1 COMPARATOR MPX
TP1
CS2
WE ALARM
D3
D2
D0
DATA BUS CONTROLLER
D1
DATA BUS
OE
TP2
MODE REGISTER
CONTROL REGISTER 1
A3
ADDRESS DECODER
A2
CONTROL REGISTER 2
A0
ADDRESS BUS CONTROLLER
A1
PD4991A
3
PD4991A
PIN FUNCTION
* WE ..................... Write control pin (input). The contents of the data bus are written to an address specified by the address bus at the rising edge of WE. * OE ..................... Read control pin (input). While OE = "L" level, the contents specified by the address bus are read to the data bus. * A3 to A0 .............. Address bus pins (input). These pins specify an internal address of the PD4991A. * D3 to D0 ............. Data bus pin (I/O). These pins constitute a bidirectional bus. * CS1, CS2 ........... Chip select pins (input). When CS1 = "L" and CS2 = "H", data can be transferred between the PD4991A and the CPU. * TP1 .................... Timing pulse pin (output) (N-ch open-drain). Outputs an alarm coincidence signal. * TP2 .................... Timing pulse pin (output) (N-ch open-drain). Outputs an interval timer signal. * XIN ...................... Crystal oscillation signal pin (input). Inverter input for oscillation. * XOUT ................... Crystal oscillation signal pin (output). Inverter output for oscillation. * VDD ..................... Positive power supply pin. * VSS ..................... GND pin.
4
PD4991A
ABSOLUTE MAXIMUM RATINGS (VSS = 0 V)
PARAMETER Supply Voltage Input Voltage Range Output Pin Breakdown Voltage Low-Level Output Current (N-ch open-drain) Operating Ambient Temperature Storage Temperature SYMBOL VPP VIN VOUT IOUT Topt Tstg RATINGS -0.3 ~ 7.0 -0.3 ~ VPP + 0.3 7.0 30 -40 ~ +85 -65 ~ +125 UNIT V V V mA C C
ELECTRICAL CHARACTERISTICS (VSS = 0 V, f = 32.768 kHz, CG = CD = 20 pF, Ci = 20 k, Ta = -40 to +85 C)
PARAMETER Operating Voltage Range High-level Input Voltage Low-level Input Voltage Current Consumption * Current Consumption * Current Consumption * High-Level Input Leakage Current Low-Level Input Leakage Current High-Level Output Voltage Low-Level Output Voltage Low-Level Output Voltage High-Level Leakage Current SYMBOL MIN. VDD VIH VIL IDD IDD IDD ILIH ILIL VOH VOL1 VOL2 ILOH 2.4 0.4 0.4 1.0 2 2.0 0.7 VDD VSS 5 TYP. MAX. 5.5 VDD 0.3 VDD 14 10 6 +1.0 -1.0 UNIT V V V CONDITIONS
A A A A A
V V V
VDD = 3.6 V, VIN = VSS, Ta = -40 ~ +70 C VDD = 3.0 V, VIN = VSS, Ta = -40 ~ +70 C VDD = 2.4 V, VIN = VSS, Ta = -40 ~ +70 C VDD = 5.5 V, VIN = VDD VDD = 5.5 V, VIN = VSS IOH = -1.0 mA IOL = 2.0 mA IOL = 1.0 mA (Nch Open Drain) TPout = VDD (Nch Open Drain)
A
* If VIN pins are not VSS, Current Consumption increase in value.
AC CHARACTERISTICS Write cycle (Unless otherwise specified, VDD = 5 V 10 %, Ta = -40 to +85 C)
PARAMETER Cycle Time CS-WE Reset Time Address-WE Reset Time Address-WE Setup Time Write Pulse Width Address Hold Time Input Data Setup Time Input Data Hold Time WE-Output Floating Time SYMBOL MIN. tWC tCW tAW tAS tWP tWR tDW tDH tWHZ 150 120 120 0 90 20 50 0 50 ns TYP. MAX. UNIT CONDITIONS
5
PD4991A
Write Cycle (VDD = 2.7 to 3.6 V, Ta = -40 to +85 C)
PARAMETER Cycle Time CS-WE Reset Time Address-WE Reset Time Address-WE Setup Time Write Pulse Width Address Hold Time Input Data Setup Time Input Data Hold Time WE-Output Floating Time SYMBOL MIN. tWC tCW tAW tAS tWP tWR tDW tDH tWHZ 210 170 170 0 30 20 100 0 70 ns TYP. MAX. UNIT CONDITIONS
6
PD4991A
Write cycle timing 1
tWC ADDRESS
OE
tAW tCW
CS tAS WE tOHZ DOUT DIN tWP tWR
tDW
tDH
Write cycle timing 2 (OE = VIL)
tWC ADDRESS tAW tCW CS tAS WE tWHZ DOUT tDW DIN tDH tOW tWP tWR
7
PD4991A
READ CYCLE (Unless otherwise specified, VDD = 5 V 10 %, Ta = -40 to +85 C)
PARAMETER Cycle Time Address Access Time CS-Access Time OE-Output Delay Time OE-Output Delay Time OE-Output Delay Time Output Hold Time CS-Output Set Time CS-Output Floating Time SYMBOL MIN. tRC tAA tACS tOE tOLZ tOHZ tOH tCLZ tCHZ 15 0 5 5 50 150 150 150 75 ns TYP. MAX. UNIT CONDITIONS
Read Cycle (VDD = 2.7 to 3.6 V, Ta = -40 to +85 C)
PARAMETER Cycle Time Address Access Time CS-Access Time OE-Output Delay Time OE-Output Delay Time OE-Output Delay Time Output Hold Time CS-Output Setup Time CS-Output Floating Time SYMBOL MIN. tRC tAA tACS tOE tOLZ tOHZ tOH tCLZ tCHZ 20 15 10 10 70 210 210 210 110 ns TYP. MAX. UNIT CONDITIONS
8
PD4991A
Read cycle timing 1
CS tRC
ADDRESS tAA tOH
OE tOE DOUT tOLZ Output Data
Read cycle timing 2
ADDRESS tRC
CS tACS
tCHZ
OE tCLZ tOHZ
DOUT
Output Data
9
PD4991A
FUNCTION SPECIFICATIONS
* Reference frequency (X'tal OSC) ........... 32.768 kHz * Data format .............................................. BCD format * Data function Year, month, day, date, hour, minute, and second counters Leap year and months are automatically identified. Leap year is identified every 4 years and can be set to any year. Year is set in 2 digits. Hour can be displayed in 12- or 24-hour mode. * Data input/output (D3, D2, D1, D0) 4-bit parallel input/output format Data is written by WE signal and read by OE signal. * Function mode selection With ADDRESS = "FH" (A3, A2, A1, A0 = 1, 1, 1, 1), a mode is selected by DATA (D3, D2, D1, D0) input, and set by input of WE signal. A function is selected by ADDRESS input. * Timing pulse outputs (TP1, TP2) TP1 ... Alarm coincidence signal. One of the following is selectable: 2048 Hz 1024 Hz 64 Hz 16 Hz 1 Hz 1 pulse output (H L) TP2 ... Interval timer signal output. One of the following is selectable: 60 s 30 s 10 s 1s 0.1 s * Chip select (CS1, CS2) When CS1 = "H" or CS2 = "L," all inputs except XIN are disabled (non-select). When CS1 = "L" and CS2 = "H," all inputs are selected.
10
PD4991A
FUNCTION OUTLINE
* The PD4991A has the following three modes: 1 BASIC TIME MODE In this mode, data can be written and read between the timer counter and the CPU. Moreover, control registers 1 and 2 can be specified by a command*. 2 ALARM SET & TP1 CONTROL MODE In this mode, data is set to the alarm register, the function of TP1 is set, and control registers 1 and 2 are specified by a command*. 3 ALARM SET & TP2 CONTROL MODE In this mode, data is set to the alarm register, the function of TP2 is set, the 12- or 24-hour mode is selected, leap year identification function is set, and control registers 1 and 2 are specified by a command*. * Control registers 1 and 2 are commonly used in all the modes. To select a mode, write mode data to ADDRESS = "FH." Once a mode has been set, it is retained until a new mode is set. Table 1 shows the correspondence between modes and mode data.
11
PD4991A
Table 1 Correspondence between Mode Data and Modes ADDRESS = (1, 1, 1, 1)
DATA MSB LSB 0 0 0 0 1 * * * * * 00 01 10 11 * * BASIC TIME MODE ALARM SET & TP1 CONTROL MODE ALARM SET & TP2 CONTROL MODE BASIC TIME MODE Inhibited FUNCTION
* Irrelevant. This bit is ignored. Note: The difference between mode (0, *, 0, 0) and mode (0, *, 1, 1) is that stages 10 to 15 of the 15-stage divider circuit are reset in the former mode when the division stage reset command (30 ADJ. RESET) is executed, and all the stages of the divider circuit are reset in the latter mode. Other commands are commonly used in both modes.
12
PD4991A
MODE DESCRIPTION
1. BASIC TIME MODE (MODE = 0 * 0 0 B) * Thirteen types of counters are provided: 10-year, 1-year, 10-month, 1-month, 10-day, 1-day, date, 10-hour, 1hour, 10-minute, 1-minute, 10-second, and 1-second. * Date codes are 00H through 06H (0000 through 0110B). (Correspondence between dates and date codes can be freely specified by the user.) * If leap year identification function is not used, the last day of February is always the 28th. The addresses corresponding to the respective digits are shown in Table 2 Address Correspondence 1. Specifications of control registers 1 and 2 are commonly applied to each mode. Tables 3 and 4 show correspondences of data 1 and 2. Refer to these data correspondence tables when setting other modes. Table 2 Address Correspondence 1 BASIC TIME MODE (MODE = 0, *, 0, 0)
DATA MSB LSB 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 1-second digit 10-second digit 1-minute digit 10-minute digit 1-hour digit 10-hour digit Date digit 1-day digit 10-day digit 1-month digit 10-month digit 1-year digit 10-year digit CONTROL REGISTER 1 CONTROL REGISTER 2 MODE REGISTER FUNCTION R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W W/O R/W W/O
R/W : READ AND WRITE W/O : WRITE ONLY Note The second most-significant bit of the data for the 10-hour digit serves as an AM/PM flag in the 12-hour mode (AM = 0/PM = 1).
13
PD4991A
Table 3 Data Correspondence Table 1 CONTROL REGISTER1 (TIME COUNTER CONTROL) ADDRESS = (1, 1, 0, 1)
D3 W/O 0 1 NOP CLOCK WAIT*4 D2 RUN CLOCK STOP*3 D1 NOP ADJUST (+/-)30 s*1 D0 NOP RESET*2
*1. ADJUST (+/-)30 s Second digit 00 to 29 00 (second) 30 to 59 00 (second) + 1 (minute) The BUSY flag remains set until a carry occurs. In MODE (0, *, 0, 0), stages 10 to 15 of the 15-stage divider are reset. In MODE (0, *, 1, 1), all the stages of the 15-stage divider are reset. *2. RESET In MODE (0, *, 0, 0), stages 10 to 15 of the 15-stage divider are reset. In MODE (0, *, 1, 1), all the stages of the 15-stage divider are reset. *3. CLOCK STOP This command is used to write time. To set time, execute the CLOCK RESET command and then the CLOCK STOP command. Then write the time data. If the data is written without the clock stopped, the correct value may not be set. *4. CLOCK WAIT This command is used to read time. When 1 is written to this bit, the clock is stopped. If the CLOCK RUN command is executed within 0.5 second, no delay in respect to the actual time occurs. Table 4 Data Correspondence Table 2 CONTROL REGISTER2 (TP1/TP2 CONTROL) ADDRESS = (1, 1, 1, 0)
D3 D2 ALARM setting 0 (TP1) W/O 1 (TP2) 0: ENABLE 1: DISABLE INTERVAL CLOCK 0: RUN 1: CLK STOP BUSY flag R/O * 0: OFF 1: ON D1 Alarm coincidence forced output flag 0: RESET 1: SET INTERVAL COUNTER 0: NOP 1: RESET Alarm coincidence flag 0: OFF 1: ON 0: ENABLE 1: DISABLE Output status 0: ENABLE 1: DISABLE Interval flag 0: OFF 1: ON D0 Output status
*: Don't Care R/O : READ ONLY W/O : WRITE ONLY
14
PD4991A
2. ALARM SET & TP1 CONTROL MODE (MODE = 0 * 0 1) ALARM SET & TP2 CONTROL MODE (MODE = 0 * 1 0) (1) Setting time to alarm register The alarm register consists of a total of 44 bits with 4 bits each of 10-month digit, 1-month digit, 10-day digit, 1-day digit, date digit, 10-hour digit, 1-hour digit, 10-minute digit, 1-minute digit, 10-second digit, and 1second digit. * Manipulating alarm register When "FH" is set to a certain digit of the alarm register, the digit is regarded as indicating an alarm coincidence, which occurs when the value of the alarm register coincides with the contents of the time counter, regardless of the data of the time counter. If "FH" is set to all the digits, alarm coincidence occurs regardless of the data of the time counter. The addresses corresponding to the respective digits are shown in Table 5 Address Correspondence Table 2. Tables 6 and 7 Data Correspondence Tables 3 and 4 show the function control of TP1/TP2. Example: An alarm coincidence occurs for 1 second at 54 minutes 32 seconds of every hour.
Digit Code 10-month 1-month FH FH 10-day FH 1-day FH Date FH 10-hour FH 1-hour FH 10-minute 1-minute 10-second 1-second 5H 4H 3H 2H
Example: An alarm coincidence occurs at 10 to 19 minites of every hour.
Digit Code 10-month 1-month FH FH 10-day FH 1-day FH Date FH 10-hour FH 1-hour FH 10-minute 1-minute 10-second 1-second 1H FH FH FH
15
PD4991A
Table 5 Address Correspondence Table 2 ALARM SET & TP1 CONTROL MODE (MODE = 0, *, 0, 1) ALARM SET & TP2 CONTROL MODE (MODE = 0, *, 1, 0)
ADDRESS MSB LSB 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 1-second digit 10-second digit 1-minute digit 10-minute digit 1-hour digit 10-hour digit Date digit 1-day digit 10-day digit 1-month digit 10-month digit TP1/TP2 FUNCTION CONTROL*1 Leap year/12.24 HOUR SELECT*2 CONTROL REGISTER1 CONTROL REGISTER2 MODE REGISTER FUNCTION R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W W/O R/W W/O R/W W/O
*: Don't Care. This bit is ignored. R/W : READ AND WRITE W/O : WRITE ONLY *1. TP1 FUNCTION CONTROL is performed in MODE (0, *, 0, 1). TP2 FUNCTION CONTROL is performed in MODE (0, *, 1, 0). *2. The leap year counter is in MODE (0, *, 0, 1). The 12/24 HOUR SELECT is in MODE (0, *, 1, 0).
16
PD4991A
Table 6 Data Correspondence Table 3 TP1 FUNCTION CONTROL (MODE = 0, *, 0, 1 ADDRESS = 1, 0, 1, 1)
DATA MSB LSB * * * * * * * * 0 1 000 001 010 011 100 101 110 111 * * * * * * 2048 Hz 1024 Hz 64 Hz 16 Hz 1 Hz 1-pulse output "H" "L" BUSY Alarm coincidence flag reset automatically Alarm coincidence flag not reset automatically FUNCTION W/O W/O W/O W/O W/O W/O W/O W/O W/O W/O
W/O: WRITE ONLY
*: Don't Care
Table 7 Data Correspondence Table 4 TP2 FUNCTION CONTROL (MODE = 0, *, 1, 0 ADDRESS = 1, 0, 1, 1)
DATA MSB LSB * * * * * 000 001 010 011 100 0.1-s interval 1-s interval 10-s interval 30-s interval 60-s interval BUSY REPEAT 1 SHOT FUNCTION W/O W/O W/O W/O W/O W/O W/O W/O
0111 0 1 * * * * * *
W/O: WRITE ONLY
*: Don't Care
17
PD4991A
(2) Selecting 12-/24-hour mode In the 12-hour mode, the second significant bit of the data for the 10-hour digit are used as an AM/PM flag. AM = 00** PM = 01** Select the 12- or 24-hour mode before setting the time. Note that, if the mode is selected after the time has been set, the data of the time counter is lost. Table 8 Data Correspondence Table 5 shows how the 12- or 24-hour mode is selected. Table 8 Data Correspondence Table 5 Leap year, 12-/24-hour mode selection (MODE = 0, *, 1, 0 ADDRESS = 1, 1, 0, 0)
D3 1: 24-hour mode 0: 12-hour mode D2 Leap Year 0: Valid 1: Invalid D1 D0
R/W
*
*
*: Don't Care Example: In 12-hour mode 10-hour digit AM 8 PM 8 AM12 PM12 0000 0100 0001 0101 1-hour digit 1000 1000 0010 0010 Hexadecimal 08H 48H 12H 52H
Notes on the use of the 12-hour mode When writing AM12, write the lower digit and then the higher digit (i.e., write "2" to the 1-hour digit, and then write "1" to the 10-hour digit); otherwise, PM12 may be set. (3) Setting leap year counter When a digit of year is written, the PD4991A automatically sets the leap year counter. Years are based on the Christian Era, and a leap year occurs every 4 years. The user can directly write data to the leap year counter. However, to do so, write the year counter first. If the leap year counter is written and then the year counter is written, the leap year counter is automatically reset. The leap year is identified when the value of the leap year counter is **00B. The leap year counter can be set independently of the year counter. The leap year counter is incremented in synchronization with the 1-year digit counter. Table 9 Data Correspondence Table 6 shows how the leap year is identified.
18
PD4991A
Table 9 Data Correspondence Table 6 Leap year counter (MODE = 0, *, 0, 1, ADDRESS = 1, 1, 0, 0)
D3 R/W * D2 * D1 D0
Leap year counter (leap year = 0, 0)
*: Don't Care Example 10-year digit 0010 Write 3 to 10-year digit Write 6 to 1-year digit Write 4 to 10-year digit Write **00B to the leap year counter 0011 0011 0100 0100 1-year digit 0101 **** 0101 **11 0110 **00 0110 **10 0110 **00 3. TIMING PULSE Incremented (Year 36 is a leap year leap year counter = 00H) (Year 46 is not a leap year . leap year counter =. 00H) Leap year counter
*
TP1 The signal output from the TP1 pin is the alarm coincidence signal. The output waveform is selected from 2048 Hz, 1024 Hz, 64 Hz, 16 Hz, 1 Hz, 1-pulse output, and "H" "L", depending on the contents set to the TP1 CONTROL REGISTER. * 1-puse output One pulse is output when the value of the alarm register coincides with the contents of the time counter. Fig. 1 1-Pulse Output Waveform
30.5 s
Alarm coincidence
19
PD4991A
* "H" "L" output The output signal of TP1 goes from "H" to "L" when the value of the alarm register coincides with the contents of the time counter. Fig. 2 "H" "L" Output Waveform
Alarm coincidence
*
Alarm coincidence flag, auto RESET When the value of the alarm register coincides with the contents of the time counter, a signal is output to the TP1 pin. This signal remains output until the value of the alarm register does not coincide with the time counter contents. Fig. 3 TP1 Output Waveform (with AUTO RESET)
2048 Hz 1 Hz
~
T Alarm coincidence
1 pulse
30.5 s
Alarm coincidence
"H" "L"
T
Alarm coincidence
20
PD4991A
Fig. 4 TP1 Output Waveform (without AUTO RESET) Without RESET of the alarm coincidence flag
2048 Hz 1 Hz Alarm coincidence Another alarm coincidence
~
1 pulse
30.5 s
Alarm coincidence
Another alarm coincidence
"H" "L"
Alarm coincidence
Another alarm coincidence
Figs. 5 and 6 show examples of applications using TP1. Fig. 5 TP1 Output Status (AUTO RESET mode)
TP1 2048 Hz 1 Hz ALARM ENABLE Alarm coincidence flag reset Output status enable Alarm Output status coincidence Alarm coincidence Alarm does not disabled flag set coincide Alarm does not Alarm Alarm does not Alarm coincidence coincide coincidence coincide flag set Alarm coincidence 30.5 s
~
1 pulse
"H" "L"
Alarm coincidence flag ON
Alarm coincidence flag OFF
Alarm coincidence flag ON
Alarm coincidence flag OFF
Alarm coincidence flag ON
21
PD4991A
Fig. 6 TP1 Output Status (without AUTO RESET)
TP1 2048 Hz 1 Hz ALARM ENABLE Alarm coincidence flag reset Output status enabled Alarm coincidence Alarm does not Output status Alarm does not flag set coincide enabled coincide Alarm coincidence Output status flag reset Alarm coincidence disabled Alarm coincidence 30.5 s
~
1 pulse
"H" "L"
Alarm coincidence flag ON
Alarm coincidence flag OFF
Alarm coincidence flag ON
TP2 SET (MODE = 0 * 1 1 B) The TP2 pin outputs an interval timer signal. This signal is cyclically output. The cycle at which the interval timer signal is output can be selected between 0.1 s, 1 s, 10 s, 30 s, and 60 s, depending on the contents indicated by the TP2 CONTROL REGISTER. Note, however, that the 0.1-s cycle does not last exactly for 0.1 second, but that five 0.1-s cycles are equivalent to one 0.5 second. If 30 s ADJ, RESET is executed in mode (0, *, 1, 1), an error occurs in the cycle. Fig. 7 TP2 Output Waveform
T
START
T
T
30.5 s
30.5 s
REPEAT output
T T
1-shot output T START 30.5 s
22
PD4991A
*
BUSY output The BUSY signal can be output to the TP1 and TP2 pins. When output of the BUSY signal is specified, only the BUSY signal is output to the TP1 and TP2 pins. The contents of the CONTROL REGISTER 2 are not affected, however. Fig. 8 BUSY Output Waveform
1st digit carry 1st digit carry
BUSY signal
BUSY TP1 or TP2 Output DISABLE SET
457.7 s 30.5 s
BUSY flag ON
BUSY flag OFF
BUSY flag ON
Fig. 9 shows an example of an application using TP2. Fig. 9 TP2 Output Status
30.5 s
30.5 s
TP2
REPEAT Output status ENABLE T T t1 t2 T T
RESET & RUN
Interval RUN CLK STOP
RESET & RUN
Interval RESET RUN CLK STOP
RESET
t1 + t2 = T 30.5 s T
1 pulse
TP2 flag ON
Note When the output status is disabled, the signal goes "H" regardless of the status of TP2.
23
PD4991A
*
Oscillation characteristics Figs. 11 and 12 show the frequency stability when the ambient temperature (Ta) and supply voltage (VDD) are . changed with a crystal of crystal impedance C1 =. 20 k and a circuit shown in Fig. 10. The stability and day difference are calculated by the following expressions: f-f f
reference value
Stability =
x 106 (ppm) Note f reference value in Fig. 12 is the measured frequency when VDD = 3.5 V.
reference value
1 Day difference = TP1 specified - frequency
1 measured fequency Note x2
number of division stage
x 60 seconds x 60 minutes x 24 hours (sec)
The number of division stages = 11 at 2048 Hz.
Fig. 10 Oscillation Characteristics Measuring Circuit
In constant temperature bath
TP1 R VDD C XOUT XIN
CG X'tal CD
VSS R C X'tal : 10 k : Tantalum capacitor (10 F) : MX-38T (Nippon Denpa Kogyo)
Fig. 11 Frequency Stability
Day difference (sec)
Fig. 12 Frequency Stability vs. Supply Voltage Characteristics
vs. Temperature Characteristics
Frequency (Hz)
2048.3
Stability (ppm)
8.4
97.7 2048.2
CD = CG = 10 pF 20 pF 30 pF
1.73 1.30 0.86
Day difference (sec)
20 CP = 20 pF 15 10
Frequency stability (ppm)
4.2
48.8 2048.1
Temperature
0 0 2048.0
CG = 10 pF CG = 20 pF CG = 30 pF
2 3 4 5 6
-40 -30 -20 -10 0
10 20 30 40 50 60 70 80 (C)
0.43 0 0.43 0.86 1.30
5 0 5
4.2
-48.4 2047.9
Supply voltage VDD (V)
8.4
-97.7 2047.8
12.7 -146.5 2047.7
VDD = 5.0 V
16.9 -195.3 2047.6
10 15
2047.5
24
PD4991A
Fig. 13 Dynamic Current Consumption Characteristics
25
CG = CD = 20 pF Ta = 25C
Dynamic current consumption IDD ( A)
PD4991
20
15
PD4991A
10
5
0
1.0
2.0
3.0
4.0
5.0
6.0 Supply voltage VDD (V)
Differences between PD4991 and PD4991A The PD4991A improves on the characteristics of the PD4991. These two products differ as follows: 1. Specifications
PARAMETER Current Consumption Current Consumption Current Consumption Input Data Setup Time Input Data Hold Time SYMBOL IDD IDD IDD tDW tDH
PD4991
20 A MAX. 15 A MAX. -- 0 ns MIN. 0 ns MIN.
PD4991A
14 A MAX. -- 6 A MAX. 50 ns MIN. 0 ns MIN.
REMARKS VDD = 3.6 V VDD = 3.0 V VDD = 2.4 V Specifications differ Specifications differ
25
PD4991A
AC Timing of PD4991
WE or CS
50%
50%
tDW
tDH
D0 ~ D3
AC Timing of PD4991A
WE or CS
50%
tDW
tDH
D0 ~ D3
2.
Function
PARAMETER Valid Range of 30 s ADJUST BUSY Flag when 30 s ADJUST D3 bit of CONTROL REGISTER 1
PD4991
1-second to 1-minute digits (no carry to 10-minute digit) Not BUSY NOP
PD4991A
All digits
BUSY until all digits are carried CLOCK WAIT
CLOCK WAIT Bit and CLOCK STOP Bit Both bits inhibit input of clock to the clock counter (1 Hz) and subsequently stop the clock. The CLOCK STOP bit is used to set the time to the clock (be sure to stop the clock when setting it). The CLOCK WAIT bit is used to prevent the CPU from reading wrong data in case counting takes place when the time is read (the time can also be read without the CLOCK WAIT bit but with the BUSY signal or by performing two reads). If the clock is run within 0.5 second after stopping the clock or placed in the wait state, no delay in respect to the actual time occurs.
26
PD4991A
Example of an Application Circuit
+5 V 10 k D3 D2 D1 D0
Data bus
A2 A1 A0
A3 A2 A1 A0 ADDRESS DECODER CS1
D0 D1 D2 D3 CS2 CG = 20 ~ 30 pF POWER FAIL
WR RD 1SS53 +5 V 2SA1175 15 k 510 1SS53
WE OE
XIN 32.768 kHz XOUT CD = 20 pF +5 V 10 k TP1
VDD C
1 k
4.7 k GND
2SC2785
Ni-Cd 3.6 V VSS
TP2
PD4991A
C: ceramic capacitor or tantalum capacitor (0.1 F to 10 F)
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
Address bus
A3
27
PD4991A
18PIN PLASTIC DIP (300 mil)
18 10
1
A I
9
K P L
J
H G F D N
M
C B M R
NOTES 1) Each lead centerline is located within 0.25 mm (0.01 inch) of its true position (T.P.) at maximum material condition. 2) ltem "K" to center of leads when formed parallel.
ITEM MILLIMETERS A B C D F G H I J K L M N P R 22.86 MAX. 1.27 MAX. 2.54 (T.P.) 0.500.10 1.2 MIN. 3.50.3 0.51 MIN. 4.31 MAX. 5.08 MAX. 7.62 (T.P.) 6.4 0.25 +0.10 -0.05 0.25 1.0 MIN. 0~15
INCHES 0.900 MAX. 0.050 MAX. 0.100 (T.P.) 0.020 +0.004 -0.005 0.047 MIN. 0.1380.012 0.020 MIN. 0.170 MAX. 0.200 MAX. 0.300 (T.P.) 0.252 0.010 +0.004 -0.003 0.01 0.039 MIN. 0~15
P18C-100-300A,C-1
28
PD4991A
20 PIN PLASTIC SOP (300 mil)
20 11 detail of lead end
1 A
10 H
G
P
I
J
F
K
E
C D
NOTE
N M
M
B
L
ITEM MILLIMETERS A B C D E F G H I J K L M N P 13.00 MAX. 0.78 MAX. 1.27 (T.P.) 0.40 +0.10 -0.05 0.10.1 1.8 MAX. 1.55 7.70.3 5.6 1.1 0.20 +0.10 -0.05 0.60.2 0.12 0.10 3 +7 -3
INCHES 0.512 MAX. 0.031 MAX. 0.050 (T.P.) 0.016 +0.004 -0.003 0.0040.004 0.071 MAX. 0.061 0.3030.012 0.220 0.043 0.008 +0.004 -0.002 0.024 +0.008 -0.009 0.005 0.004 3 +7 -3
Each lead centerline is located within 0.12 mm (0.005 inch) of its true position (T.P.) at maximum material condition.
P20GM-50-300B, C-4
29
PD4991A
RECOMMENDED SOLDERING CONDITIONS The following conditions must be met when soldering this product. Please consult with our sales offices when using other soldering process or under different conditions.
Type of Surface Mounting Device
PD4991 AGS
Soldering process Infrared ray reflow Soldering conditions Peak temperature of package surface: 235 C or below, Reflow time: 30 seconds or less (210 C or higher), Number of reflow process: 2, Exposure limit*: None Peak temperature of package surface: 215 C or below, Reflow time: 40 seconds or less (200 C or higher), Number of reflow process: 2, Exposure limit*: None Soldering temperature: 260 C or below Flow time: 10 seconds or less, Number of reflow process: 1, Exposure limit*: None Pin temperature: 300 C or below, Time: 10 seconds or below (per side of leads) Symbols IR35-00-2
VPS
VP15-00-2
Wave soldering
WS60-00-1
Partial heating method
--
* Exposure limit before soldering after dry-pack is opened. Storage condition: 25 C and relative humidity at 65 % or less. Caution Do not apply more than a single process once, except for "Partial heating method."
Type of Through-Hole Device
PD4991 ACX
Soldering process Wave soldering Soldering conditions Soldering temperature: 260 C or below
30
PD4991A
[MEMO]
31
PD4991A
[MEMO]
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product.
M4 96.5
32

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